Revised the tracks and vias

- Rewired the entire board again, after learning new things about PCB-design.

tpm-module-14pin-spi-MZ32-AR0-rev-10-CTM010/Revision A2/tpm-module-14pin-spi-RevA2/tpm-module-14pin-spi-RevA2.kicad_prl

@@ -64,7 +64,7 @@
       35,
       36
     ],
-    "visible_layers": "7fdffcf_80000001",
+    "visible_layers": "7fdffef_80000001",
     "zone_display_mode": 0
   },
   "meta": {

tpm-module-14pin-spi-MZ32-AR0-rev-10-CTM010/Revision A2/tpm-module-14pin-spi-RevA2/tpm-module-14pin-spi-RevA2.kicad_pro

@@ -131,7 +131,7 @@
         "min_via_diameter": 0.39999999999999997,
         "solder_mask_clearance": 0.0,
         "solder_mask_min_width": 0.0,
-        "solder_mask_to_copper_clearance": 0.0,
+        "solder_mask_to_copper_clearance": 0.005,
         "use_height_for_length_calcs": true
       },
       "teardrop_options": [

tpm-module-14pin-spi-MZ32-AR0-rev-10-CTM010/Revision A2/tpm-module-14pin-spi-RevA2/tpm-module-14pin-spi-RevA2.kicad_sch

@@ -3701,13 +3701,13 @@
     (property "Reference" "IC1" (at 80.01 99.06 0)
       (effects (font (size 1.27 1.27)))
     )
-    (property "Value" "Infineon-SLB9670" (at 80.01 132.08 0)
+    (property "Value" "SLB 9670XQ2.0 FW7.85" (at 80.01 132.08 0)
       (effects (font (size 1.27 1.27)))
     )
     (property "Footprint" "Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.1x3.1mm" (at 81.28 93.98 0)
       (effects (font (size 1.27 1.27)) hide)
     )
-    (property "Datasheet" "https://www.infineon.com/dgdl/Infineon-SLB%209670VQ2.0-DataSheet-v01_04-EN.pdf?fileId=5546d4626fc1ce0b016fc78270350cd6" (at 80.01 96.52 0)
+    (property "Datasheet" "https://datasheet.lcsc.com/lcsc/2108140030_Infineon-Technologies-SLB-9670XQ2-0-FW7-85_C539139.pdf" (at 80.01 96.52 0)
       (effects (font (size 1.27 1.27)) hide)
     )
     (pin "17" (uuid 2c123f72-1565-4b26-a564-1ddb2d2da37a))